[xen stable-4.9] x86emul: correct VEX.L handling for VCVT{, T}S{S, D}2SI

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[xen stable-4.9] x86emul: correct VEX.L handling for VCVT{, T}S{S, D}2SI

patchbot
commit e8fd37235064347cfd8c089b48e23280551d35a3
Author:     Jan Beulich <[hidden email]>
AuthorDate: Fri Oct 6 14:56:47 2017 +0200
Commit:     Jan Beulich <[hidden email]>
CommitDate: Fri Oct 6 14:56:47 2017 +0200

    x86emul: correct VEX.L handling for VCVT{,T}S{S,D}2SI
   
    Recent changes to the SDM (and XED) have made clear that older hardware
    raising #UD when the bit is set was really an erratum. Generalize the
    so far AMD-only override.
   
    Signed-off-by: Jan Beulich <[hidden email]>
    Reviewed-by: Andrew Cooper <[hidden email]>
    master commit: a6488965ca3ec30f2e0b7022b539bba78c2aeede
    master date: 2017-09-05 17:32:05 +0200
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 30a8f13..5066410 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5609,9 +5609,8 @@ x86_emulate(
         }
         else
         {
-            if ( ctxt->vendor == X86_VENDOR_AMD )
-                vex.l = 0;
-            generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD);
+            generate_exception_if(vex.reg != 0xf, EXC_UD);
+            vex.l = 0;
             host_and_vcpu_must_have(avx);
             get_fpu(X86EMUL_FPU_ymm, &fic);
         }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.9

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